SD；SDIO总线协议分析仪

 The SDDL1000™ SD Bus Protocol Tracer allows design engineers working with SD and SDIO technology to capture, decode and analyze bus states, command and response tokens, and to measure SD bus performance.

Offering continuous sampling the SDDL1000 can cut down the time needed to identify and resolve bus errors. The SDDL1000 can also provide sufficient debug information in real time without any need to set complex trigger events. Users can also view SD bus traffic prior to the error point to identify the source of the problem. Debug output is displayed in a straightforward but detailed format providing extensive information even for users less familiar with SD/SDIO/MMC specifications.

The SDDL1000 is a highly portable SD/SDIO logger device which can also be connected to a logic analyzer or oscilloscope to extend its capabilities.

Key Features

• Continuous SD/SDIO bus sampling
• SD Specification v2.00
• SDIO Specification v2.00
• SD Part 3 Security Specification v.3.00 (CPRM)
• SD/SDHC/SDIO 1-bit & 4-bit modes supported
• MMC support
• Real time SD/SDIO bus trace
• SDIO Interrupt detection
• CRC error detection
• Full bus decoding
• Data trace export and raw data mode
• Windows XP, Vista, 7 compatible
• Java-based GUI with trace export capability

Technical Features

• Max. SD bus clock 50MHz.
• Signal sampled:CMD, DAT0, DAT1, DAT2, DAT3
• Hi-Speed (480Mbps) USB interface for continuous capture
• Continuous capture for unlimited SD trace acquisition*
• CRC7/CRC16 verification
• Detailed command/data decoding
• External triggering of oscilloscopes for waveform capture
• Multiple intelligent triggering options – trigger on commands and data patterns
• Intuitive user interface
• Performance measurement and monitoring
• Programming meets the Confidential SD Specifications, Part 1, 2, & 3